The present disclosure relates to circuits for determining the polarity of a voltage to be measured. The present disclosure also relates to systems for detecting a consumed current or a charge amount of an electronic device to which power is supplied from a secondary battery, and a charging current or an integrated charge value during charging of the secondary battery, to detect or estimate the remaining capacity of the secondary battery, and more particularly, to circuits for measuring charged and discharged charge amounts of a secondary battery.
In recent years, mobile electronic devices are driven by a rechargeable secondary battery, and most of them have an LSI having a function of displaying the remaining capacity of the secondary battery. The LSI detects a charge amount or a current, and if the secondary battery is being charged, adds the detected charge amount to a post-discharge battery capacity, and if the secondary battery is being discharged, subtracts the detected charge amount from a post-charge battery capacity. The decision about whether to add or subtract is determined based on the polarity of a charging/discharging current which indicates whether the battery is being charged or discharged. The result of the addition or subtraction indicates a remaining capacity (also referred to as a remaining charge amount, a residual capacity, etc.). By displaying this, a state of the secondary battery can be known. A unit which detects such a charge amount or current is referred to as a charge amount measurement circuit (also referred to as a coulomb counter).
An example conventional determination of the polarity of a charging/discharging current and an example conventional charge amount measurement circuit will be described hereinafter. In the charge amount measurement circuit, a sensing resistor connected in series between a secondary battery and a load or a charger in order to detect a charge amount or a current. The sensing resistor has a resistance value of as small as several tens of milliohms to several hundreds of milliohms in order to reduce the influence of its own power consumption and voltage drop on the load.
A current flowing through the sensing resistor depends on the consumed current or charging current of the mobile electronic device. In general, the magnitudes of the consumed current and the charging current are about several amperes. In the above case, for example, if the sensing resistor has a resistance value of 20 mΩ, the maximum charging current is −6.25 A (the sign “−” indicates the direction of a current during charging), and the maximum consumed current is +6.25 A (the sign “+” indicates the direction of a current during discharging), a voltage between both ends of the sensing resistor is ±125 mV. In conventional voltage polarity determination circuits and conventional charge amount measurement circuits, this input voltage is amplified by a differential amplifier circuit, or charge is integrated by an integration circuit including an operational amplifier circuit. The differential amplifier circuit and the operational amplifier circuit typically have an input offset voltage which varies among products within the range of ±several millivolts. For example, the input offset voltage of ±1 mV corresponds to a current of ±50 mA flowing through the sensing resistor. In other words, the measurement range of the conventional voltage polarity determination circuit and the conventional charge amount measurement circuit is, for example, −6.25 A to −50 mA and +50 mA to +6.25 A.
FIG. 24 is a diagram showing a configuration of a conventional voltage polarity determination circuit 303 (see The editorial department of Transistor Technology (editors), “Handbook of Battery Applications,” CQ Publishing Co., Ltd., 2005, p. 165, FIG. 2-4-5). The voltage polarity determination circuit 303 includes an integration circuit 300, an initialization circuit 331, a first and a second comparison circuit 601 and 602, and a first and a second counter 603 and 604. The integration circuit 300 includes an operational amplifier circuit 300a which is designed to reduce an input offset voltage Vos. The initialization circuit 331 includes a voltage source which outputs an initial voltage Vc and a switch SW3 which sets an end of a capacitor C1 used in the integration circuit 300 to the initial voltage Vc. The first comparison circuit 601 compares an output voltage V30 of the integration circuit 300 with a first reference voltage VH. The first counter 603 measures the time interval between when the switch SW3 is transitioned to the non-conductive state and is therefore cut off the initial voltage Vc and when an output V31 of the first comparison circuit 601 is inverted. The second comparison circuit 602 compares the output voltage V30 of the integration circuit 300 with a second reference voltage VL. The second counter 604 measures the time interval between when the switch SW3 is transitioned to the non-conductive state and is therefore cut off the initial voltage Vc and when an output V32 of the second comparison circuit 602 is inverted. In the integration circuit 300, the capacitor C1 is connected in parallel between an output terminal e and an inverting input terminal c of the operational amplifier circuit 300a, a resistor R1 is connected between the inverting input terminal c and a terminal a, and a reference voltage GND is connected to a non-inverting input terminal d of the operational amplifier circuit 300a via a GND terminal b.
Next, operation of the conventional voltage polarity determination circuit 303 thus configured will be described with reference to FIGS. 25A-25D.
A charging/discharging current flows through a sensing resistor Rin between the secondary battery and the reference voltage GND, so that an input voltage Vin appears between both ends of the sensing resistor Rin. In this case, the output voltage V30 of the integration circuit 300 is represented by:
                              V          30                =                              -                          1                                                C                  1                                ⁢                                  R                  1                                                              ⁢                      ∫                                          (                                                      V                    in                                    ±                                      V                    os                                                  )                            ⁢                              ⅆ                t                                                                        (        1        )            
The slope with respect to time t is represented by:
                                          ⅆ                          V              30                                            ⅆ            t                          =                              -                          1                                                C                  1                                ⁢                                  R                  1                                                              ·                      (                                          V                in                            ±                              V                os                                      )                                              (        2        )            
FIGS. 25A-25D show voltage waveforms obtained when the input voltage Vin>Vos (charging) and voltage waveforms obtained when the input voltage Vin<−Vos (discharging), where the input offset voltage Vos>0.
Initially, in the charge state, if the input offset voltage Vos>0 and the input voltage Vin>Vos, the slope of the output voltage V30 of the integration circuit 300 is calculated by Expression 2 and is represented by:
                                          ⅆ                          V              30                                            ⅆ            t                          =                                            -                              1                                                      C                    1                                    ⁢                                      R                    1                                                                        ·                          (                                                V                  in                                -                                  V                  os                                            )                                <          0                                    (        3        )            
As shown in FIG. 25B, as time t increases, the output voltage V30 of the integration circuit 300 decreases. Therefore, the output voltage V30 reaches from the initial voltage Vc to the reference voltage GND, so that the output V32 of the second comparison circuit 602 which compares the output voltage V30 with the second reference voltage VL is inverted (FIG. 25D), whereby the conventional voltage polarity determination circuit 303 determines that the second battery is in the charge state.
Next, in the discharge state, if the input offset voltage Vos>0 and the input voltage Vin<−Vos, the slope of the output voltage V30 of the integration circuit 300 is calculated by Expression 2 and is represented by:
                                          ⅆ                          V              30                                            ⅆ            t                          =                                            -                              1                                                      C                    1                                    ⁢                                      R                    1                                                                        ·                          (                                                V                  in                                -                                  V                  os                                            )                                =                                                    1                                                      C                    1                                    ⁢                                      R                    1                                                              ·                              (                                                      V                    in                                    +                                      V                    os                                                  )                                      >            0                                              (        4        )            
As shown in FIG. 25B, as time t increases, the output voltage V30 of the integration circuit 300 increases. Therefore, the output voltage V30 reaches from the initial voltage Vc to a reference voltage Vdd, so that the output V31 of the first comparison circuit 601 which compares the output voltage V30 with the first reference voltage VH is inverted (FIG. 25C), whereby the conventional voltage polarity determination circuit 303 determines that the second battery is in the discharge state.
Therefore, the polarity of the charging/discharging current can be correctly determined when the input voltage Vin is within the range represented by:Vin<−Vos, Vos<Vin  (5)
When the input offset voltage Vos<0, the same result as that of Expression 5 is obtained and therefore will not be here described.
FIG. 26 is a diagram showing a configuration of a conventional charge amount measurement circuit 2 (see Japanese Patent Publication No. 2000-241515). The conventional charge amount measurement circuit 2 includes a first switch 101, an integration circuit 200 including an operational amplifier circuit 200a which is designed to reduce an input offset voltage Vos, a first comparison circuit 102 which compares an output voltage V20 of the integration circuit 200 with a first reference voltage VH, a second comparison circuit 103 which compares the output voltage V20 of the integration circuit 200 with a second reference voltage VL, a logic circuit 104 which receives respective output voltages V42 and V43 of the first and second comparison circuits 102 and 103, a second switch 105 whose conductive and non-conductive states are controlled based on an output voltage V44 of the logic circuit 104, an asynchronous counter 206 which counts the number of times of inversion of the output voltage of the first comparison circuit 102 or the second comparison circuit 103, a timer 207 which, when the first switch 101 is switched to a GND terminal b, measures a time interval Tos which elapses until the output voltage of one of the first comparison circuit 102 or the second comparison circuit 103 is inverted, and when the first switch 101 is switched to an input terminal a, indicates the lapse of the time interval Tos, and a register 108 which stores a value measured by the timer 207 and sets the measured value into the timer 207.
In the integration circuit 200, a capacitor C and the second switch 105 are connected together in parallel between an output terminal e and an inverting input terminal c of the operational amplifier circuit 200a, a resistor R is connected between the inverting input terminal c of the operational amplifier circuit 200a and the input terminal a, and a GND terminal b is connected to a non-inverting input terminal d of the operational amplifier circuit 200a. 
Next, operation of the conventional charge amount measurement circuit 2 thus configured will be described. Here, to facilitate the understanding of the operation, an example will be described in which a current is constant, i.e., the input voltage Vin is constant, and the input offset voltage Vos>0.
Before measurement of a charge amount during charging/discharging, a trimming step is provided as an information collection period for correcting the influence of the input offset voltage Vos of the operational amplifier circuit 200a. 
FIGS. 27A-27F show operation of the trimming step. Initially, the first switch 101 is switched to the GND terminal b, so that the input voltage Vin=0 V (FIG. 27A). In this case, the output voltage V20 of the integration circuit 200 increases from the second reference voltage VL to the first reference voltage VH during the time interval Tos, and therefore, the following is established (FIG. 27B):
                              V          H                =                                            -                              1                CR                                      ⁢                                          ∫                0                                  T                  os                                            ⁢                                                (                                      0                    -                                          V                      os                                                        )                                ⁢                                  ⅆ                  t                                                              +                      V            L                                              (        6        )            
Here, Vdd>VH>VL>0 V, where Vdd is a power supply voltage.
According to Expression 6, the time interval Tos is represented by:
                              T          os                =                  CR          ·                                                    V                H                            -                              V                L                                                    V              os                                                          (        7        )            
After the time interval Tos, the output voltage V42 of the first comparison circuit 102 is inverted as shown in FIG. 27C. The inverted output voltage V42 causes the logic circuit 104 to output a signal which causes the second switch 105 to transition to the conductive state (FIG. 27E). When the second switch 105 is transitioned to the conductive state, both ends of the capacitor C are short-circuited, so that the output voltage V20 of the integration circuit 200 decreases (FIG. 27B). When the output voltage V20 of the integration circuit 200 decreases to reach the second reference voltage VL, the output voltage V43 of the second comparison circuit 103 is inverted (FIG. 27D). The inverted output voltage V43 causes the logic circuit 104 to output a signal which causes the second switch 105 to transition to the non-conductive state (FIG. 27E). When the second switch 105 is transitioned to the non-conductive state, the output voltage V20 of the integration circuit 200 increases again (FIG. 27B). The timer 207 measures the time interval Tos which it takes for the output voltage V20 of the integration circuit 200 to reach from the second reference voltage VL to the first reference voltage VH, using a clock CLK having a period Tclk (FIG. 27F). This measured time information Nos is stored in the register 108, and the stored time information Nos is set in the timer 207. The time information Nos represents a charge amount corresponding to the input offset voltage Vos. After the above trimming step, control proceeds to a measurement step.
The measurement step is performed in two states, a charge state and a discharge state. Firstly, operation during charging will be described with reference to FIGS. 28A-28G. Here, operation of the conventional charge amount measurement circuit 2 under a condition which allows the circuit 2 to output a correct result, i.e., the input voltage Vin is twice or more as large as the input offset voltage Vos (Vin>2Vos), will be described (FIG. 28A).
In the measurement step, the first switch 101 is switched to the input terminal a, so that the input terminal a and the GND terminal b are connected to both ends of the sensing resistor Rin. In this case, the output voltage V20 of the integration circuit 200 decreases from the first reference voltage VH to the second reference voltage VL during a time interval Tm, and therefore, the following is established (FIG. 28B):
                              V          L                =                                            -                              1                CR                                      ⁢                                          ∫                0                                  T                  m                                            ⁢                                                (                                                            V                      in                                        -                                          V                      os                                                        )                                ⁢                                  ⅆ                  t                                                              +                      V            H                                              (        8        )            
Because the input voltage Vin is assumed to be constant, the time interval Tm is represented by:
                              T          m                =                  CR          ·                                                    V                H                            -                              V                L                                                                    V                in                            -                              V                os                                                                        (        9        )            
Also, here, because the input voltage Vin>2Vos, the time interval Tm is shorter than the time interval Tos measured in the trimming step. That is, the following is established:Tm<Tos  (10)
After the time interval Tm, the output voltage V43 of the second comparison circuit 103 is inverted as shown in FIG. 28D. The inverted output voltage V43 causes the logic circuit 104 to output a signal which causes the second switch 105 to transition to the conductive state (FIG. 28E). In this case, the asynchronous counter 206 increments by one (FIG. 28G). When the second switch 105 is transitioned to the conductive state, both ends of the capacitor C are short-circuited, so that the output voltage V20 of the integration circuit 200 increases (FIG. 28B). When the output voltage V20 of the integration circuit 200 increases to reach the first reference voltage VH, the output voltage V42 of the first comparison circuit 102 is inverted (FIG. 28C). The inverted output voltage V42 causes the logic circuit 104 to output a signal which causes the second switch 105 to transition to the non-conductive state (FIG. 28E). When the second switch 105 is transitioned to the non-conductive state, the output voltage V20 of the integration circuit 200 decreases again. When the output voltage V20 of the integration circuit 200 reaches the second reference voltage VL (FIG. 28B), the asynchronous counter 206 increments by one (FIG. 28G). These incremented values are a charge amount obtained by subtracting a charge amount corresponding to the input offset voltage Vos from a charge amount corresponding to the input voltage Vin generated between both ends of the sensing resistor Rin. The above operation is repeated if the input voltage Vin continues to satisfy the condition that Vin>2Vos.
The timer 207 outputs a signal indicating the lapse of the time interval Tos stored in the register 108. Every time the time interval Tos has elapsed, the asynchronous counter 206 increments by one (FIG. 28G). The incremented value is a charge amount corresponding to the input offset voltage Vos measured in the trimming step, and therefore, the charge amount corresponding to the input offset voltage Vos is corrected.
Next, operation during discharging will be described with reference to FIGS. 29A-29G. Here, operation where the input voltage Vin<0 V will be described (FIG. 29A).
Similar to charging, in the measurement step, the first switch 101 is switched to the input terminal a, so that the input terminal a and the GND terminal b are connected to both ends of the sensing resistor Rin. In this case, the output voltage V20 of the integration circuit 200 increases from the second reference voltage VL to the first reference voltage VH during the time interval Tm. Therefore, the following is established:
                              V          H                =                                            -                              1                CR                                      ⁢                                          ∫                0                                  T                  m                                            ⁢                                                (                                                            V                      in                                        -                                          V                      os                                                        )                                ⁢                                  ⅆ                  t                                                              +                      V            L                                              (        11        )            
Because the input voltage Vin is assumed to be constant, the time interval Tm is represented by:
                              T          m                =                  CR          ·                                                    V                H                            -                              V                L                                                                    -                                  V                  in                                            +                              V                os                                                                        (        12        )            
Also, here, because the input voltage Vin<0 V, the time interval Tm is shorter than the time interval Tos measured in the trimming step, similar to charging. That is:Tm<Tos  (13)
After the time interval Tm, the output voltage V42 of the first comparison circuit 102 is inverted as shown in FIG. 29C. The inverted output voltage V42 causes the logic circuit 104 to output a signal which causes the second switch 105 to transition to the conductive state (FIG. 29E). In this case, the asynchronous counter 206 increments by one (FIG. 29G). When the second switch 105 is transitioned to the conductive state, both ends of the capacitor C are short-circuited, the output voltage V20 of the integration circuit 200 decreases (FIG. 29B). When the output voltage V20 of the integration circuit 200 decreases to reach the second reference voltage VL, the output voltage V43 of the second comparison circuit 103 is inverted (FIG. 29D). The inverted output voltage V43 causes the logic circuit 104 to output a signal which causes the second switch 105 to transition to the non-conductive state (FIG. 29E). When the second switch 105 is transitioned to the non-conductive state, the output voltage V20 of the integration circuit 200 increases again. When the output voltage V20 of the integration circuit 200 reaches the first reference voltage VH (FIG. 29B), the asynchronous counter 206 increments by one (FIG. 29G). These incremented values include a charge amount corresponding to the input voltage Vin occurring between both ends of the sensing resistor Rin and a charge amount corresponding to the input offset voltage Vos. When the input voltage Vin continues to satisfy the condition that Vin<0 V, the above operation is repeated.
The timer 207 outputs a signal indicating the lapse of the time interval Tos stored in the register 108. Every time the time interval Tos has elapsed, the asynchronous counter 206 decrements by one (FIG. 29G). The decremented value is a charge amount corresponding to the input offset voltage Vos measured in the trimming step, and the charge amount corresponding to the input offset voltage Vos is corrected.
Thus, the conventional charge amount measurement circuit 2 corrects the influence of the input offset voltage Vos during both charging and discharging under the following condition which is the same as that indicated by Expressions 10 and 13:Tm<Tos  (14)
The conventional voltage polarity determination circuit 303 has the input offset voltage Vos which is not intended in the operational amplifier circuit 300a used in the integration circuit 300. Therefore, under some conditions of the input voltage Vin, the state of the output voltage V30 of the integration circuit 300 is not changed, so that two problems arise that the polarity of the charging/discharging current cannot be determined and that there is an input voltage range within which the polarity of the charging/discharging current cannot be correctly determined.
As to the first problem, when the input voltage Vin is equal to the input offset voltage Vos, Expression 1 is rewritten by:
                    Tc        =                                            C              1                        ⁢                                          R                1                            ·                                                                    V                    H                                    -                                      V                    L                                                                                        V                    in                                    ±                                      V                    os                                                                                =                      {                                                            ∞                                                                      (                                                                  V                        in                                            =                                              -                                                  V                          os                                                                                      )                                                                                                ∞                                                                      (                                                                  V                        in                                            =                                              V                        os                                                              )                                                                                                          (        15        )            where Tc represents both of the time interval between the initial voltage Vc and the second reference voltage VL and the time interval between the initial voltage Vc and the first reference voltage VH.
None of the output voltages V31 and V32 of the first and second comparison circuits 601 and 602 may be inverted, and therefore, the polarity of the charging/discharging current may not be determined.
As to the second problem, the polarity of the charging/discharging current may be incorrectly determined under some conditions of the input voltage Vin and the input offset voltage Vos.
Here, by checking the slope of the output voltage V30 of the integration circuit 300 within each voltage range of the input voltage Vin where the input offset voltage Vos>0, the result of determination by the conventional voltage polarity determination circuit 303 is compared.
When Vos>0, the output voltage V30 of the integration circuit 300 is:
                              V          30                =                              -                          1                                                C                  1                                ⁢                                  R                  1                                                              ⁢                      ∫                                          (                                                      V                    in                                    -                                      V                    os                                                  )                            ⁢                              ⅆ                t                                                                        (        16        )            
The slope of the output voltage V30 of the integration circuit 300 is represented by:
                                          ⅆ                          V              30                                            ⅆ            t                          =                              -                          1                                                C                  1                                ⁢                                  R                  1                                                              ·                      (                                          V                in                            -                              V                os                                      )                                              (        17        )            
When Vin>Vos, i.e., charging is performed, the following is established:
                                          ⅆ                          V              30                                            ⅆ            t                          =                                            -                              1                                                      C                    1                                    ⁢                                      R                    1                                                                        ·                          (                                                V                  in                                -                                  V                  os                                            )                                <          0                                    (        18        )            
The result of determination by the conventional voltage polarity determination circuit 303 indicates charging, which is correct.
When 0<Vin<Vos, i.e., charging is performed, the following is established:
                                          ⅆ                          V              30                                            ⅆ            t                          =                                            -                              1                                                      C                    1                                    ⁢                                      R                    1                                                                        ·                          (                                                V                  in                                -                                  V                  os                                            )                                >          0                                    (        19        )            
The result of determination by the conventional voltage polarity determination circuit 303 indicates discharging, which is incorrect.
When Vin<0, i.e., discharging is performed, the following is established:
                                          ⅆ                          V              30                                            ⅆ            t                          =                                            -                              1                                                      C                    1                                    ⁢                                      R                    1                                                                        ·                          (                                                V                  in                                -                                  V                  os                                            )                                >          0                                    (        20        )            
The result of determination by the conventional voltage polarity determination circuit 303 indicates discharging, which is correct.
Similarly, when Vos<0, the output voltage V30 of the integration circuit 300 is:
                              V          30                =                              -                          1                                                C                  1                                ⁢                                  R                  1                                                              ⁢                      ∫                                          (                                                      V                    in                                    +                                      V                    os                                                  )                            ⁢                              ⅆ                t                                                                        (        21        )            
The slope of the output voltage V30 of the integration circuit 300 is represented by:
                                          ⅆ                          V              30                                            ⅆ            t                          =                              -                          1                                                C                  1                                ⁢                                  R                  1                                                              ·                      (                                          V                in                            +                              V                os                                      )                                              (        22        )            
When Vin>0, i.e., charging is performed, the following is established:
                                          ⅆ                          V              30                                            ⅆ            t                          =                                            -                              1                                                      C                    1                                    ⁢                                      R                    1                                                                        ·                          (                                                V                  in                                +                                  V                  os                                            )                                <          0                                    (        23        )            
The result of determination by the conventional voltage polarity determination circuit 303 indicates charging, which is correct.
When −Vos<Vin<0, i.e., discharging is performed, the following is established:
                                          ⅆ                          V              30                                            ⅆ            t                          =                                            -                              1                                                      C                    1                                    ⁢                                      R                    1                                                                        ·                          (                                                V                  in                                +                                  V                  os                                            )                                <          0                                    (        24        )            
The result of determination by the conventional voltage polarity determination circuit 303 indicates charging, which is incorrect.
When Vin<−Vos, i.e., discharging is performed, the following is established:
                                          ⅆ                          V              30                                            ⅆ            t                          =                                            -                              1                                                      C                    1                                    ⁢                                      R                    1                                                                        ·                          (                                                V                  in                                +                                  V                  os                                            )                                >          0                                    (        25        )            
The result of determination by the conventional voltage polarity determination circuit 303 indicates discharging, which is correct.
FIGS. 30A-30D show example operation of the conventional voltage polarity determination circuit 303 when the input voltage Vin is 0<Vin<Vos (charge state) and when Vin<0 (discharge state), where the input offset voltage Vos>0. In both the charge state and the discharge state, the output voltage V30 of the integration circuit 300 reaches the first reference voltage VH, and only the output V31 of one of the first and second comparison circuits 601 and 602 is inverted, and therefore, the polarity of the charging/discharging current is incorrectly determined in the charge state.
FIG. 31 is a diagram showing whether the result of determination by the conventional voltage polarity determination circuit 303 is correct or incorrect with respect to the input offset voltage Vos and the input voltage range of the input voltage Vin. As can be seen from FIG. 31, the conventional voltage polarity determination circuit 303 has a range within which the determination result is incorrect, with respect to the input voltage range.
As described above, in the conventional voltage polarity determination circuit 303, none of the output voltages V31 and V32 of the first and second comparison circuits 601 and 602 may be inverted, due to the input offset voltage Vos of the operational amplifier circuit 300a used in the integration circuit 300, so that the polarity of the charging/discharging current may fail to be determined, and moreover, the polarity of the charging/discharging current may be incorrectly determined within some input voltage ranges.
Also, the conventional charge amount measurement circuit 2 have problems that it takes a long time to perform the trimming step when the input offset voltage Vos is close to 0 V and that there is a range within which measurement is not allowed and which is called a dead zone, within the input voltage range, under some input conditions.
As to the first problem, in the trimming step, when the input offset voltage Vos is close to 0 V, Expression 7 is rewritten as:
                              T          os                =                              CR            ·                                                            V                  H                                -                                  V                  L                                                            V                os                                              ≈                      ∞            ⁢                                                  ⁢                          (                                                V                  os                                ≈                                  0                  ⁢                  V                                            )                                                          (        26        )            
It may takes a long time for the output voltages of both the first and second comparison circuits 102 and 103 to be inverted. In other words, the trimming step takes a long time, which is disadvantageous to the mass production of the product. Moreover, when the trimming step takes a longer time, the timer 207 which measure information over a longer time and the register 108 which stores the information require a larger number of bits, resulting in an increase in circuit size, which causes an increase in area.
The second problem is that the conventional charge amount measurement circuit 2 has a dead zone. In the measurement step, when the input voltage Vin is within the dead zone range, the measurement time may be longer than the time interval Tos measured in the trimming step, so that the output voltage V20 of the integration circuit 200 may not increase, and the asynchronous counter 206 may not increment. Therefore, the charge amount may not be measured during charging/discharging.
FIGS. 32A and 32B are diagrams showing a distribution of the input offset voltage Vos and ranges of the input voltage Vin, of the operational amplifier circuit 200a of the integration circuit 200 included the conventional charge amount measurement circuit 2. The input offset voltage Vos of the operational amplifier circuit 200a cannot be caused to be 0 V for all mass-produced products, i.e., there are invariably variations in the input offset voltage Vos (FIG. 32A). For example, when the input offset voltage of a product is +Vos, the time interval Tm which it takes for the output voltage V20 of the integration circuit 200 to reach from the second reference voltage VL to the first reference voltage VH in the conventional charge amount measurement circuit 2, is represented by Expression 9 above.
When Vin<0 V and Vin>2Vos, Tm<Tos, and therefore, the conventional charge amount measurement circuit 2 can correct the influence of the input offset voltage Vos.
However, when the input voltage Vin is within the range of 0 V≦Vin≦2Vos, the following is established:Tm>Tos  (27)
The conventional charge amount measurement circuit 2 does not have a function of correcting the influence of the input offset voltage Vos under this input condition, and therefore, cannot measure a correct charge amount. Similarly, if the input offset voltage of a product including the conventional charge amount measurement circuit 2 is −Vos, then when −2Vos≦Vin<0 V, the conventional charge amount measurement circuit 2 cannot measure a correct charge amount.
Therefore, when the input offset voltages Vos of mass-produced products vary within the range of −Vos to +Vos, there is a range within which the charge amount cannot be correctly measured, such as the range of −2Vos to +2Vos, i.e., a dead zone (FIG. 32B). For example, the input offset voltage of ±1.5 mV corresponds to a current of ±150 mA flowing through the sensing resistor Rin. The conventional charge amount measurement circuit 2 has measurement ranges of −2.0 A to −300 mA and +300 mA to +2.0 A and a dead zone of −300 mA to +300 mA.
If the standby current of a mobile electronic device having a secondary battery whose capacity is 2400 mAh is 15 mA, the charge amount (quantity of electricity) of 2400 mAh is exhausted in about one week, i.e., the actual remaining capacity is zero. However, because the conventional charge amount measurement circuit 2 has a dead zone, the remaining capacity is displayed as 2400 mAh.
As described above, in the conventional charge amount measurement circuit 2, when the input offset voltage Vos of the operational amplifier circuit 200a used in the integration circuit 200 is close to 0 V, it takes a long time to perform the trimming step, and therefore, the circuit sizes of the timer 207 for measuring information for a long time and the register 108 for storing the information increase, leading to an increase in area. Moreover, there is a problem that there is a dead zone and therefore there is an input voltage range within which measurement cannot be correctly performed.